This application relies for priority upon Korean Patent Application No. 2001-44450, filed on Jul. 24, 2001, the contents of which are herein incorporated by reference in their entirety.
Field of the Invention
The present invention relates to an apparatus of testing an integrated circuit interconnection. More particularly, the present invention relates to a test apparatus which is suitable for testing a leakage protection reliability of an integrated circuit interconnection having a high via density.
As semiconductor devices become highly integrated, sizes of individual devices and wires or interconnections become smaller. As one method of highly integrating the semiconductor devices, semiconductor devices may be formed to have three-dimensional structures. For example, interconnections of connecting semiconductor devices are formed over multiple layers to have three-dimensional structure in the semiconductor devices.
With reference to the multilayered interconnection, it is very difficult to form many semiconductor cells and to connect these cells one another for fabricating a circuit. Very crowded and complicated interconnections are formed in one layer. But, when the interconnections are complicated, it is almost impossible to connect all circuits in one layer. In order to resolve this difficulty and to increase the efficiency, first, a lower interconnection is formed, secondly, an interlayer dielectric layer is formed, and thirdly, an upper interconnection is formed. A contact hole is formed at the interlayer dielectric layer and a plug fills the contact hole to connect the upper interconnection with the lower interconnection, thereby forming a circuit. As the circuit becomes complicated, the number of the layers used in multilayered interconnection continuously increases.
When a circuit is designed according to a certain design rule, a test for reliability of an interconnection is performed. In the test, it is possible to test whether a gap between patterns is too narrow and a potential difference between patterns is too high. Also, for the test, a weak point where an electric field is concentrated is artificially fabricated, and a maximum voltage or a maximum current is applied thereto. In order to increase the efficiency of the test, a minimum interconnection part of the designed circuit is composed of a plurality of repeated patterns, a certain voltage is applied to each opposite patterns in repeated pattern pairs. The form of the pattern may not be identical with the real thing, but be simplified and fixed. As an important method of testing the leakage protection reliability, a standard combxe2x80x94comb-like (hereinafter, simply combxe2x80x94comb) pattern or comb-serpentine (hereinafter, simply comb-serpentine) pattern is used.
However, this method is used for evaluating a leakage protection reliability between interconnections in one layer. That is, in an initial step of fabricating an integrated circuit, a contact or a via connecting different layers has a lower density than the density of an interconnection formed in one layer. Additionally, when a via or a contact is required, it is possible to form it at a relatively untroubled point i.e. an area of relatively low circuit density. Thus, a conventional apparatus of testing an integrated circuit is for detecting a problem between narrow interconnections in one layer rather than a problem of a via or a contact connecting between layers.
FIG. 1 illustrates an apparatus of testing a comb-serpentine pattern, which is a typical example of a conventional apparatus of testing an integrated circuit.
Referring to FIG. 1, one comb pattern 10 or 20 has one length portion and multiple tooth portions extending orthogonally from the length portion at the same level with the length portion. The tooth portions are orthogonal to the length portion, parallel with one another and repeated, thereby having the same length. In a test apparatus, a pair of comb patterns 10 and 20 are aligned with facing each other, and the tooth portions of one comb pattern are running between other tooth portions of the other comb pattern. A serpentine pattern 30 is present between the pair of the comb pattern. Between the pair of the comb patterns, the serpentine-like pattern 30 passes parallel with the tooth portions between two tooth portions and turns vertically at a region between the length portion of one comb pattern and the end of the tooth portion of the other comb pattern. A maximum electric field 40 is localized at a region adjacent to the ends of the tooth portion and the neighboring serpentine pattern. Since the maximum electric field 40 is localized at the every end of the tooth portions, there are plural instances of maximum electric field 40. When a leakage or a short is not generated at the every maximum electric field 40, the design of a semiconductor device exhibits stability and reliability.
A form of apparatus for testing a leakage or a short generated between interconnection layers is shown in FIG. 2. In the form, two conductive layers 50 and 60 are formed and one interlayer dielectric layer 70 is interposed therebetween. Potential difference is applied through two electrodes 80 connected with each conductive layer. But, the form is too simplified to find a real-world problem related to a via or a contact according to a multilayered interconnection of a semiconductor device. Thus, in case that a via or a contact is substantially troubled in a relatively simple semiconductor device having few vias or contacts, the trouble is caught by an experiential method of trial and error.
As semiconductor devices become extremely highly integrated, and interconnections become multilayered, the density of vias or contacts increases. A short or a leakage current may be frequently generated between vias. However, in a highly integrated semiconductor device, a small difference in process conditions may result in a considerable difference in results or effects. For example, in case of using a different method of forming a via hole and filling the via hole with a conductive material, or in case of using a different conductive material, a formed via may have a different characteristic with respect to the leakage current or the short.
For more specific examples, in an integrated semiconductor device, copper is used for an interconnection and a via to reduce resistance of an interconnection or a contact. But, when the copper is processed, the processed surface of copper or copper oxide tends to be rough. Thus, using the copper may substantially result in the narrow interconnection gap due to the rough surface or other irregularity thereof and result in strong possibility of failure, in comparison with other interconnection metal having the same interconnection gap.
Additionally, when the copper is used, a dual damascene process is generally employed because of difficulty in patterning. When an aspect ratio of the via hole is increased, a barrier layer is formed at the surface of the via hole by employing a sputtering method before filling the via hole with metal interconnection. But, the barrier layer is not well stacked at an edge where the sidewall and the low surface of the via hole are connected, and thus, the copper of high conductivity may contact at a neighboring silicon oxide layer. A leakage or an insulation breakdown may be more frequently created at the bottom of the via than at other regions.
The leakage or the short may result from various causes. If there are a lot of spots having strong possibilities of failure like the leakage current or the short circuit, it is difficult to find out the failed spots and to revise them. Thus, without a systematic test, it is difficult to know whether a leakage or a short may be generated between vias in a semiconductor device. Consequently, a systematic and operational method is required also to detect the failed spots between vias or contacts. In order to realize the method, a test apparatus having a specific pattern is required, in which a design rule of a related semiconductor device is reflected and failed spots between vias are importantly treated to the exclusion of other failed possibilities between other parts.
Thus, it is an object of the present invention to provide an apparatus of testing a leakage protection reliability in multilayered interconnections of an integrated circuit, in which a failed spot such as a leakage or a short may be easily and effectively detected between vias.
It is another object of the present invention to provide an apparatus of testing a leakage protection reliability in interconnections of an integrated circuit, in which a failed spot such as a leakage or a short is systematically and intentionally detected between vias.
It is still another object of the present invention to provide an apparatus of testing a leakage protection reliability in interconnection of an integrated circuit having a pattern, in which a failed spot related to a via of a semiconductor device is tested by confirming a problem between vias, at the exclusion of influence between a via and an interconnection.
The present invention is directed to an apparatus of testing a leakage protection reliability in interconnections of an integrated circuit. The apparatus includes a serpentine pattern and a comb pattern. These patterns are not formed in one conductive layer.
In a first structure of the present invention, the comb pattern has a straight length portion, and multiple tooth portions which orthogonally protrude from the length portion. The tooth portions are parallel with one another and repeated at the same level with the length portion, thereby having the same length. Vias of the comb pattern are formed vertically from the ends of the tooth portions. The serpentine pattern includes a unit part and a connection part.
The connection part connects two unit parts. The unit part has two tooth parallel parts, a length parallel part, and two vias. The tooth parallel part is parallel with the tooth portion and the end of the tooth parallel part is spaced from the end of the tooth portion by a minimum design length. The length parallel part is parallel with the length portion and connects the two tooth parallel parts.
The two vias of the serpentine pattern extend vertically from the ends of the two tooth parallel parts. The vias of the serpentine and the comb patterns are parallel with one another through the same interlayer dielectric layer. The via of the comb pattern is preferably located within the minimum design length deviation from an imaginary line connecting the neighboring vias of the serpentine pattern at the central position between the neighboring two vias of the serpentine pattern according to a design rule.
The connection part is parallel to the length portion and connected with the ends of the vias of the neighboring two unit parts, thereby electrically connecting the two unit parts. Additionally, the first structure of the present invention includes means of applying a certain bias voltage to the comb and the serpentine patterns, respectively, thereby generating a potential difference between the two patterns.
In the present invention, the tooth parallel part is preferably longer than the length parallel part at least by the minimum design length according to the design rule. Thus, it is easy and effective to find out a failed spot such as a leakage or a short resulting from the interaction between the via of the comb pattern and the neighboring two vias of the serpentine pattern, at the exclusion of the vias which are located at an opposite position. Also, the connection part should be spaced wide apart from the neighboring length portion by at least the minimum design length according to the design rule.
In the apparatus of the present invention, the comb pattern and the serpentine pattern are formed of a conductive layer including a conductive semiconductor layer, and insulated from each other. The comb pattern and the serpentine pattern may or may not be formed of one material.
The vias of the serpentine pattern electrically connect the connection part and the tooth parallel part which are present at different levels, but the other vias of the comb pattern may or may not connect the tooth portion with other conductor. Also, the via of the comb pattern may be formed differently from the other via of the serpentine pattern in the width thereof.
In a first aspect of the present invention, the length portion and the tooth portion may be formed at a lower interconnection layer and the vias of the comb pattern may be formed to an upward direction from the end of the tooth portion. The connection part may be formed at the same level with the length portion and the tooth portion, and the unit part may be formed at a relatively upper interconnection layer, or on the contrary, the connection part may be formed at the upper interconnection layer and the unit part may be formed at the lower interconnection layer.
If the length portion and the tooth portion in the comb pattern are formed at a relatively upper interconnection layer, the via of the comb pattern extends to a downward direction from the end of the tooth portion. The connection part may be formed at the same upper interconnection layer with the length portion and the tooth portion, and the unit part may be formed at a relatively lower interconnection layer. In contrast, the connection part may be formed at the lower interconnection layer and the unit part may be formed at the upper interconnection layer.
In any form described above, one via of the comb pattern is spaced from the neighboring two vias of the serpentine pattern by the minimum design length, and the three vias of the comb pattern and the serpentine pattern are formed in a line through the same interlayer dielectric layer.
According to a second aspect of the present invention, another comb pattern is added laterally from the serpentine pattern and at the opposite position of the original comb pattern. The two comb patterns are aligned with facing each other, and the one serpentine pattern is interposed between i.e. interleaved with, the two comb patterns. The tooth portions of the additional comb pattern are running between the tooth parallel parts and extend parallel therewith. The tooth portions and the length portions of the two comb patterns are formed at the same level, and the vias formed at the ends of the tooth portions in the two comb patterns extend in the same direction. In the second aspect, the length parallel part of the serpentine pattern has a level different from the level of the tooth parallel part and electrically connects with the tooth parallel part. As the new comb pattern is added, the length parallel part acts as a connection part, and thus, it may be referred to as another connection part. The tooth parallel parts are parallel to the all tooth portions of the two comb patterns. Vias of the serpentine patterns are formed at all turning points where the tooth parallel parts are met with the connection parts or the length parallel parts.
The additional comb pattern has the same shape with the original comb pattern, so that the additional one may be overlapped with the original one through a parallel movement and rotation. Alternatively, the additional one may be different from the original one in length or width of the tooth portion, or in a material thereof.
In the second aspect of the present invention, the serpentine pattern may or may not have the identical opening or aperture size with respect to the comb patterns located to the left and right hand side of the serpentine pattern. That is, a design length between a via of the original comb pattern and the neighboring two vias of the serpentine pattern may be different from that between another via of the additional comb pattern and the neighboring two vias of the serpentine pattern.